Modeling and Simulation of Variable-Reluctance Step Motors with Application to a High-Performance Printer System

Basic information on modeling and digital computer simulation of variable-reluctance (VR) step motors is provided. The nonlinear equations of the system are derived, and a method for implementing them on a digital computer is presented. As an example, a typical printer with a step motor is designed with this approach. The problem is defined by giving the desired system performance criteria and the step motor parameters and characteristics. The specification of the control schemes determined the design. Computer simulation runs are made to determine the optimal control parameters of the system. The case study demonstrates the advantages of the computer-aided design, before the physical construction of the experimental system.     

Organoclay effect on transverse compressive strength of glass/epoxy nanocomposites

This research focuses on the fabrication of glass fiber/epoxy nanocomposites containing organoclay as well as understanding the organoclay effect on the transverse compressive strength of nanocomposites. To demonstrate the organoclay effect, three different loadings of organoclay were dispersed, respectively, in the epoxy resin using a mechanical mixer followed by sonication. The corresponding glass/epoxy nanocomposites were produced by impregnating dry glass fiber with organoclay epoxy compound through a vacuum hand lay-up procedure. Unidirectional block specimens were employed for transverse compression tests on a hydraulic MTS machine. Experimental observations indicate that glass/epoxy nanocomposites containing organoclay exhibit higher transverse compressive strength than conventional composites. Furthermore, the failure mechanisms for all tested specimens were found to be fiber and matrix debonding. Therefore, results indicate that the increasing characteristic in transverse failure stress may be ascribed to the enhanced fiber/matrix adhesion modified by the organoclay.     

Detection and classification of defect patterns on semiconductor wafers

The detection of process problems and parameter drift at an early stage is crucial to successful semiconductor manufacture. The defect patterns on the wafer can act as an important source of information for quality engineers allowing them to isolate production problems. Traditionally, defect recognition is performed by quality engineers using a scanning electron microscope. This manual approach is not only expensive and time consuming but also it leads to high misidentification levels. In this paper, an automatic approach consisting of a spatial filter, a classification module and an estimation module is proposed to validate both real and simulated data. Experimental results show that three types of typical defect patterns: (i) a linear scratch; (ii) a circular ring; and (iii) an elliptical zone can be successfully extracted and classified. A Gaussian EM algorithm is used to estimate the elliptic and linear patterns, and a spherical-shell algorithm is used to estimate ring patterns. Furthermore, both convex and nonconvex defect patterns can be simultaneously recognized via a hybrid clustering method. The proposed method has the potential to be applied to other industries.     

Robust position control of DC servomechanism with output measurement noise

This note presents a systematic robust control method for DC servomechanism based on the sliding mode technique. The noise in the measured position is considered. The proposed approach guaranteed system robustness against parameter variations and external disturbances. The common requirement of an integral function in the formulation of sliding surface is eliminated. The position tracking error dynamics in the sliding mode is assigned. Several practical techniques for implementing the control scheme are provided as well.     

波带交换中一种新型的多颗粒光交叉连接结构

随着波分复用(WDM)技术的迅速发展和广泛应用,光网络中交叉连接的规模不断增大,网络结构也越来越复杂.为了降低WDM网络中光域传输和交换的成本,人们提出了波带交换(WBS)技术,并对此进行了大量的研究.文章介绍了部分WBS和多颗粒光交叉连接(MG-OXC)的基本概念,并提出了一种新型的MG-OXC结构.     

A 0.7-2-GHz self-calibrated multiphase delay-locked loop

A 0.7-2-GHz precise multiphase delay-locked loop (DLL) using a digital calibration circuit is presented. Incorporating with the proposed digital calibration circuit, the mismatch-induced timing error among multiphase clocks in the proposed DLL can be self-calibrated. When the calibration procedure is finished, the digital calibration circuit can be turned off automatically to save power dissipations and reduce noise generations. A start controlled circuit is proposed to enlarge the operating frequency range of the DLL. Both the start-controlled circuit and the calibration circuit require an external reset signal to ensure the correctness of the calibration after temperature,operating frequency, and power supply voltage are settled. This DLL with the digital calibration circuit has been fabricated in a 0.18-/spl mu/m CMOS process. The measured results show the DLL exhibits a lock range of 0.7-2 GHz while the peak-to-peak jitter and rms jitter is 18.9ps and 2.5 ps at 2 GHz, respectively. When the calibration procedure is completed and the DLL operates at 1 GHz, the maximum mismatch-induced timing error among multiphase clocks is reduced from 20.4 ps (7.34 degree) to 3.5 ps (1.26 degree).     

An automatic coefficient design methodology for high-order bandpass sigma-delta modulator with single-stage structure

An automatic coefficient design method for synthesis of bandpass sigma-delta modulators (BPSDMs) is presented in this brief. Single-stage BPSDM structures, cascade-of-resonator with distributed feedback, cascade-of-resonator with distributed feedforward, and a new structure with lower coefficient spread, are all used to fit the synthesized coefficients. The automatic coefficient design method is realized in an easy-to-use computer program. Even for inexperienced designers, reliable and high-tolerance BPSDM coefficients for various applications can be automatically and efficiently generated. The methodology covers many design concerns including BPSDM coefficient tolerance for circuit component mismatch, design tradeoffs among in-band noise suppression, oversampling ratio, modulator order and quantizer bit number. Finally, design examples with orders of 6 and 8, and quantizer bit number of 1-bit and 3-bit, respectively, are used for the verification of the proposed automatic coefficient design method.     

GaAsSb/InAlAs PA DHBTs Grown by Production MBE

The epi material growth of GaAsSb based DHBTs with InAlAs emitters are investigated using a 4 × 100mm multi-wafer production Riber 49 MBE reactor fully equipped with real-time in-situ sensors including an absorption band edge spectroscope and an optical-based flux monitor. The state-of-the-art hole mobilities are obtained from 100nm thick carbon-doped GaAsSb. A Sb composition variation of less than ± 0.1 atomic percent across a 4 × 100mm platen configuration has been achieved. The large area InAlAs/GaAsSb/InP DHBT device demonstrates excellent DC characteristics,such as BVCEO＞6V and a DC current gain of 45 at 1kA/cm2 for an emitter size of 50μm × 50μm. The devices have a 40nm thick GaAsSb base with p-doping of 4. 5 × 1019cm-3 . Devices with an emitter size of 4μm × 30μm have a current gain variation less than 2% across the fully processed 100mm wafer. ft and fmax are over 50GHz,with a power efficiency of 50% ,which are comparable to standard power GaAs HBT results. These results demonstrate the potential application of GaAsSb/InP DHBT for power amplifiers and the feasibility of multi-wafer MBE for mass production of GaAsSb-based HBTs.     

Triple-frequency planar monopole antenna for side-feed communication device on GSM/DCS/PCS operation

A novel side-feed planar monopole antenna capable of triple-frequency operation at about 900, 1800 and 1900 MHz is presented. The planar monopole antenna occupies a small area of 6/spl times/31 mm, and is easily made using thin copper. The planar monopole antenna can be side-fed and mounted perpendicularly to the main circuit board of a communication device so that it offers a novel design with a free degree of feed point so as to save device space, resulting in a low profile to the system ground plane. In addition, the obtained impedance bandwidths of the proposed antenna at about 900, 1800 and 1900 MHz can cover the GSM (890-960 MHz), DCS (1710-1880 MHz) and PCS (1850-1990 MHz) bands.